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ADAS

ZF and SiliconAuto reveal I/O interface chip with companion microcontroller

Zahra AwanBy Zahra AwanMarch 16, 20262 Mins Read
The new ZF and SiliconAuto Microcontroller viewed in a promo pic, on a white background.
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ZF and SiliconAuto have showcased a new I/O interface chip and companion microcontroller for automotive high-performance computers. The presentation at Embedded World 2026 in Nuremberg, Germany, was the first live demonstration of real-time sensor data acquisition and pre-processing on silicon, the companies said. The system has been designed to support next-generation advanced driver assist systems and automated driving.

The new solution combines a new ZF I/O interface chip with SiliconAuto’s XMotiv M3 microcontroller, which functions as a safety controller. The architecture offers an alternative to monolithic System-on-Chip (SoC) designs, providing scalability, energy efficiency and cost-effective performance. It also remains agnostic to OEMs’ choice of performance SoC, integrating through standardized high-speed interfaces such as PCIe or Ethernet.

The chip architecture enables OEMs to offload sensor acquisition and pre-processing from expensive SoCs, freeing CPU power for perception and driving functions. The I/O interface chip handles low-latency camera image signal processing and on-chip radar processing, reducing data transfers to DDR memory and lowering clock speeds for improved energy efficiency.

The solution is modular and upgradable, enabling individual chips or chiplets to be updated without a complete redesign. It is suitable for a wide range of vehicles, from entry-level ADAS systems to premium models, and supports deterministic data streaming with precise time stamping and sensor synchronization.

SiliconAuto’s XMotiv M3 microcontroller complements the chip by managing fast, secure boot, power sequencing, clock control and reset supervision via its 160MHz core. Together, the system provides a scalable, flexible alternative to traditional high-performance computing SoCs, enabling OEMs to connect to any sensor generation and AI inference engine while maintaining system efficiency.

Future iterations of the platform will integrate open standards-based die-to-die interconnects such as UCIe, turning the I/O chip into a fully compliant chiplet. This approach enables OEMs to independently upgrade compute, AI and I/O components while supporting long-term design flexibility and data sovereignty.

The project received support from the German Federal Ministry of Research, Technology and Space (BMFTR) under the ZuSEKI‑mobil program, which aims to foster secure, sustainable, and European-based microelectronics.

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