We're a fabless semiconductor company founded in Madrid in 2010
Tasks and Responsibilities:
- Verify digital logic using System Verilog and reusable, standardized methodologies.
- Verify digital systems that use both custom and standard IP components and interconnects, including microprocessor cores and hierarchical memory subsystems.
- Contribute to verification and modeling at the chip top level.
- Debug tests with design engineers to deliver functionally correct design blocks. Work closely with the design and test teams to define test specifications, verification plans and manufacturing transfer.
- Create and maintain verification infrastructure and tools.
- Collect and analyze coverage metrics and establish verification best practices.
- Required title: MSc in Electronic, Electrical, Computer Engineering or relevant field.
- Required expertise: at least 3 years in similar tasks.
- Experience in the verification of designs such as transceivers ICs and System on Chip (SoC).
- Experience with industry-standard simulators, revision control systems and regression systems.
- Experience with UPF flow.
- Experience with Verilog, System Verilog, SVA and functional coverage and working knowledge of makefiles and scripting languages, such as Perl or Python.
- Proven software skills.
Place of work
Tres Cantos headquarters (Madrid, Spain).
We will also consider the option of 100% remote working as a function of the candidate’s profile.
To apply for this job please visit www.kdpof.com.