Digital RTL Engineer

LinkedIn +
  • Full Time
  • Madrid

Website kdpof KDPOF

We're a fabless semiconductor company founded in Madrid in 2010

Tasks and Responsibilities:

  • Implement ASIC / SoCs / FPGAs for multiple products, starting at the specification & design phase, and continuing through technology selection, implementation, and validation. Innovation in performance, power, and cost to build the best possible product is a must.
  • Participate in all phases of ASIC / FPGA design flow (Synthesis, Place & Route, and Timing Closure) as required.
  • Work with backend teams to address any layout and timing issues for ASICs.
  • Verification by emulation with FPGAs in the lab.
  • Involvement in lead-up, validation, characterization, and qualification phases of ASICs.

 

Requirements:

  • Required title: MSc in Electronics, Electrical, Computer Engineering or relevant field.
  • Required expertise: at least 4 years in similar tasks.

 

Desirable Competencies:

  • Excellent English communication skills, both written and verbal.
  • Strong software design and skills are nice to have.
  • Continuous search for technical excellence.
  • Proactive (problem-solving) attitude.
  • Team membership attitude.

 

Place of work

  • Tres Cantos headquarters (Madrid, Spain).

We will also consider the option of 100% remote working as a function of the candidate’s profile.

To apply for this job please visit www.kdpof.com.

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